LLVM 22 will be released. As usual, I maintain lld/ELF and have added some notes to https://github.com/llvm/llvm-project/blob/release/22.x/lld/docs/ReleaseNotes.rst. I've meticulously reviewed nearly all the patches that are not authored by me. I'll delve into some of the key changes.

• --print-gc-sections=<file> has been added to redirect garbage collection section listing to a file, avoiding contamination of stdout with other linker output. (#159706)
• A VersionNode lexer state has been added for better version script parsing. This brings the lexer behavior closer to GNU ld. (#174530)
• Unversioned undefined symbols now use version index 0, aligning with GNU ld 2.46 behavior. (#168189)
• .data.rel.ro.hot and .data.rel.ro.unlikely are now recognized as RELRO sections, allowing profile-guided static data partitioning. (#148920)
• DTLTO now supports archive members and bitcode members of thin archives. (#157043)
• For DTLTO, --thinlto-remote-compiler-prepend-arg=<arg> has been added to prepend an argument to the remote compiler's command line. (#162456)
• Balanced Partitioning (BP) section ordering now skips input sections with null data, and filters out section symbols. (#149265) (#151685)
• For AArch64, fixed a crash when using --fix-cortex-a53-843419 with synthetic sections and improved handling when patched code is far from the short jump. (#170495)
• For AArch64, added support for the R_AARCH64_FUNCINIT64 dynamic relocation type for relocating word-sized data using the return value of a function. (#156564)
• For AArch64, added support for the R_AARCH64_PATCHINST relocation type to support deactivation symbols. (#133534)
• For AArch64, added support for reading AArch64 Build Attributes and converting them into GNU Properties. (#147970)
• For ARM, fixed incorrect veneer generation for wraparound branches at the high end of the 32-bit address space branching to the low end. (#165263)
• For LoongArch, -r now synthesizes R_LARCH_ALIGN at input section start to preserve alignment information. (#153935)
• For LoongArch, added relocation types for LA32R/LA32S. (#172618) (#176312)
• For RISC-V, added infrastructure for handling vendor-specific relocations. (#159987)
• For RISC-V, added support for statically resolved vendor-specific relocations. (#169273)
• For RISC-V, -r now synthesizes R_RISCV_ALIGN at input section start to preserve alignment information during two-stage linking. (#151639)

Link: lld 21 ELF changes